PLDI 2024
Mon 24 - Fri 28 June 2024 Copenhagen, Denmark
Mon 24 Jun 2024 13:40 - 14:05 at Reykjavik - 3. Applications

Industrial datapath designers consider dynamic power consumption to be a key metric. Arithmetic circuits contribute a major component of total chip power consumption and are therefore a common target for power optimization. While arithmetic circuit area and dynamic power consumption are often correlated, there is also a tradeoff to consider, as additional gates can be added to explicitly reduce arithmetic circuit activity and hence reduce power consumption. In this work, we consider two forms of power optimization and their interaction: circuit area reduction via arithmetic optimization, and the elimination of redundant computations using both data and clock gating. By encoding both these classes of optimization as local rewrites of expressions, our tool flow can simultaneously explore them, uncovering new opportunities for power saving through arithmetic rewrites using the e-graph data structure.

We develop an automated RTL to RTL optimization framework, ROVER, that takes circuit input stimuli and generates power-efficient architectures. The tool is able to reduce the total power consumption by up to 33.9%.

Mon 24 Jun

Displayed time zone: Windhoek change

13:40 - 15:20
3. ApplicationsEGRAPHS at Reykjavik
13:40
25m
Talk
Powered by Less: Low Power Circuit Synthesis
EGRAPHS
Samuel Coward Imperial College London, UK / Intel Corporation, Theo Drane Intel Corporation, USA, Emiliano Morini Intel Corporation, George A. Constantinides Imperial College London, UK
Media Attached
14:05
25m
Talk
Algorithm-Aware Hardware Optimization using E-Graph Rewriting: how should we marry software and hardware?
EGRAPHS
Jianyi Cheng University of Cambridge, Samuel Coward Imperial College London, UK / Intel Corporation, Rafael Barbalho Intel Corporation, Theo Drane Intel Corporation, USA
Link to publication DOI Media Attached
14:30
25m
Talk
Loop Saturation for Scalable High-Level Synthesis
EGRAPHS
Camille Bossut Georgia Institute of Technology, Qirun Zhang Georgia Institute of Technology, Cong "Callie" Hao Georgia Institute of Technology
Media Attached
14:55
25m
Talk
SpEQ: Translation of Sparse Codes using Equivalences
EGRAPHS
Avery Laird University of Toronto, Bangtian Liu University of Toronto, Nikolaj Bjørner Microsoft Research, Maryam Mehri Dehnavi University of Toronto
Media Attached